1. Field of the Invention
The present invention relates to a semiconductor memory such as an EEPROM having a highly efficient power supply circuit, to a memory card using EEPROMs, and to a method of driving a power supply for the EEPROM.
2. Description of the Related Art
In recent years, an IC memory card begins to be popularly used as an IC memory card having the same size as that of a credit card, and standardization thereof is performed in the field of compact information devices such as portable personal computers. For example, Japanese Electronic Industry Development Association (JEIDA) recommends JEIDA-GI-1991 "IC memory card guide line Ver. 4.1" as the standard specifications of a memory card for a personal computer. This standard is the same as PC Card Standard Release 2.0 of PCMCIA (Personal Computer Memory Card International Association) in the U.S.A., and substantially becomes an international standard.
FIGS. 1 and 2 are perspective views showing the outer appearances of IC cards to show card sizes defined by "IC memory card guide line Ver. 4.1" of JEIDA, respectively. As a physical size, each IC memory card has a size equal to that of a credit card, e.g., the short side of 54.0 mm and the long side of 85.6 mm. The thicknesses of the IC memory cards are defined as 3.3 mm (TYPE I) and 5.0 mm (TYPE II), respectively. A connector portion 71 of the short side of each IC memory card has 68 pins and a thickness of 3.3 mm. Reverse insertion preventive guide grooves 72 and 73 are formed on both the sides of the connector portion of each card. The connector portion 71 and long side portions 74 of each of the IC memory cards of TYPE I and TYPE II are a called connection portion, and the connection portion of each of the IC memory cards of TYPE I and TYPE II has a thickness of 3.3 mm. In the IC memory card of TYPE II, a central portion called a base portion 75 vertically extends, and has the maximum thickness of 5.0 mm. As memories which can be mounted on each IC card, a mask ROM, an OTPROM, an EPROM, an EEPROM, a flash memory, and an SRAM are defined. JEIDA also defines "DRAM card guide line Ver. 1.0" related to an IC memory card incorporating a DRAM. In this manner, various ROMs, various RAMs, and the like are mounted on memory cards. As a programmable memory which requires no backup power supply for holding data, an EEPROM or a flash memory is known. As a typical EEPROM, a NAND EEPROM and a NOR EEPROM are known. However, in recent years, both the NAND and NOR EEPROMs are batch-erase type EEPROMs called flash EEPROMs. The flash memory is a kind of EEPROMs (Electrically Erasable Programmable Read Only Memories), and may be called a flash EEPROM. Since the NAND EEPROM uses a Fowler-Nordheim tunnel current, the power consumption of the NAND EEPROM is small. For this reason, the NAND EEPROM incorporates a booster in its memory chip. The booster generates voltages of 10 V and 20 V required for write/erase operations from an external 5 V power supply, so that the NAND EEPROM can be operated by a single 5 V power supply. On the other hand, since a recent NOR EEPROM uses hot-electron injection, power consumption increases in a write operation. Thus the NOR EEPROM cannot incorporate a booster and therefore requires two external power supplies, i.e., 5 and 12 V power supplies. However, the NOR EEPROM may be of an FN tunneling type in the future.
FIG. 3 is a block diagram showing the schematic arrangement of an IC memory card incorporating a NAND EEPROM. A 68-pin connector defined by "PCMCIA Release 2.0" is arranged in a memory card main body 91, and the 68 pin connector is constituted by address connection pins 12, data bus connection pins 13, control bus connection pins 14, and a power supply pin 15, and the like. A NAND EEPROM 96 and a control IC 17 are mounted in the memory card 91. Although the NAND EEPROM 96, which is practically used at present, such as a 4 Mbit NAND EEPROM TC584000 available from Toshiba Corporation can be operated by a single 5 V power supply, the NAND EEPROM 96 incorporates a booster 97 for generating high voltages of about 10 V and 20 V required for write/erase operations, as described above. This booster 97, for example, as shown in FIG. 4, is a circuit constituted by combining capacitors 80.sub.1 to 80n, transistor switches 81.sub.1 to 81.sub.n, 82.sub.1 to 82.sub.n, and 83.sub.1 to 83.sub.n and using a scheme called a charge pump scheme (Jpn. Pat. Appln. KOKAI Publication No. 61-80598). In this booster 97, since the resistance loss of each transistor switch and dielectric loss of each capacitor are large, a power conversion efficiency of about 20% is obtained at most. However, since the power consumption of the NAND EEPROM is relatively small and requires a current of about 60 mA in write/erase operations, the NAND EEPROM is practically used such that the NAND EEPROM incorporates the booster 97 and can be operated by a single power supply. However, in a battery-driven portable information device or the like, a decrease in power consumption is required to make a long time operation possible.
FIG. 5 is a block diagram showing the schematic arrangement of an IC memory card incorporating a NOR flash memory. A 68-pin connector defined by PCMCIA Release 2.0 is arranged in a memory card main body 101, and the 68-pin connector is constituted by address bus connection pins 12, data bus connection pins 13, control bus connection pins 14, power supply pins 15 and 106, and the like. A NOR flash memory 66 and a control IC 67 are mounted in the memory card 101. A prior art using the NOR EEPROM 66 will be described below. For example, 5 V and 12 V power supplies must be arranged for an 8 Mbit flash memory 28F008SA available from Intel Corporation. Each of the 5 V and 12 V power supplies has a large power consumption, i.e., about 30 mA. When the NOR EEPROM incorporates a booster having a low power supply efficiency, the power consumption more increases. For this reason, the NOR EEPROM incorporates no booster. That is, the NOR flash memory 66 incorporates no booster for generating a high voltage of 12 V required for write and erase operations. Therefore, an IC memory card requires two types of power supplies.
In this manner, an EEPROM or a flash memory requires a high-voltage power supply in write/erase operations. In an IC memory card incorporating these memories, when a booster-incorporating memory such as a NAND EEPROM is used, a power supply efficiency decreases. On the other hand, when a memory such a NOR EEPROM to which a power supply voltage is externally applied is used, two power supplies are required. That is, although the NAND memory has a low power consumption, since its conventional power supply unit uses a circuit using a charge pump scheme, the NAND memory has a low efficiency. A booster for an EEPROM having a high conversion efficiency has not been developed. When a decrease in power consumption of an IC memory card is considered, a conventional booster is not satisfactorily used. In addition, since the NOR memory basically has a large power consumption, the NOR memory cannot incorporate a power supply. Thus the NOR memory requires a plurality of external power supplies. For this reason, connection between the NOR memory and external power supplies becomes complex.